Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
4a79a47b7dd03dd4b2776ee40322b0149935d234
/
.
/
src
/
Testcases
/
YosysTests
/
misc
/
scripts
/
rename_enumerate.ys
blob: 93a076649887fefc73fbcc64d434fd867327c23b [
file
] [
log
] [
blame
]
read_verilog
../
top
.
v
proc
tee
-
o result
.
log rename
-
enumerate middle mid_module
