blob: edb012853402ffc5df0761b5fe75eef91f47d5fd [file] [log] [blame]
[INFO :CM0023] Creating log file ../../../build/tests/Scr1/slpp_all/surelog.log.
Scan libraries took 0.000s
[WARNI:PP0103] src/includes/scr1_arch_description.svh:57 Undefining an unknown macro "SCR1_RVE_EXT".
[WARNI:PP0103] src/includes/scr1_arch_description.svh:63 Undefining an unknown macro "SCR1_CLKCTRL_EN".
Preprocessing took 0.486s
Preprocessing took 0.486s
PP SSL Parsing: 0.000 /home/alain/Surelog/build/dist/Release//sv/builtin.sv
PP SSL Parsing: 0.008 src/pipeline/scr1_pipe_hdu.sv
PP SSL Parsing: 0.002 src/pipeline/scr1_pipe_tdu.sv
PP SSL Parsing: 0.002 src/pipeline/scr1_ipic.sv
PP SSL Parsing: 0.006 src/pipeline/scr1_pipe_csr.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_exu.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_ialu.sv
PP SSL Parsing: 0.006 src/pipeline/scr1_pipe_idu.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_ifu.sv
PP SSL Parsing: 0.002 src/pipeline/scr1_pipe_lsu.sv
PP SSL Parsing: 0.000 src/pipeline/scr1_pipe_mprf.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_top.sv
PP SSL Parsing: 0.000 src/core/primitives/scr1_reset_cells.sv
PP SSL Parsing: 0.000 src/core/primitives/scr1_cg.sv
PP SSL Parsing: 0.000 src/core/scr1_clk_ctrl.sv
PP SSL Parsing: 0.000 src/core/scr1_tapc_shift_reg.sv
PP SSL Parsing: 0.002 src/core/scr1_tapc.sv
PP SSL Parsing: 0.002 src/core/scr1_tapc_synchronizer.sv
PP SSL Parsing: 0.002 src/core/scr1_core_top.sv
PP SSL Parsing: 0.008 src/core/scr1_dm.sv
PP SSL Parsing: 0.000 src/core/scr1_dmi.sv
PP SSL Parsing: 0.002 src/core/scr1_scu.sv
PP SSL Parsing: 0.002 src/top/scr1_dmem_router.sv
PP SSL Parsing: 0.000 src/top/scr1_imem_router.sv
PP SSL Parsing: 0.000 src/top/scr1_dp_memory.sv
PP SSL Parsing: 0.002 src/top/scr1_tcm.sv
PP SSL Parsing: 0.002 src/top/scr1_timer.sv
PP SSL Parsing: 0.002 src/top/scr1_mem_axi.sv
PP SSL Parsing: 0.004 src/top/scr1_top_axi.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_tracelog.sv
PP SSL Parsing: 0.002 src/tb/scr1_memory_tb_axi.sv
PP SSL Parsing: 0.004 src/tb/scr1_top_tb_axi.sv
Cache saving: 0.000000
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Parsing took 20.594s
SLL Parsing: 0.060 ../../../build/tests/Scr1/slpp_all/work//home/alain/Surelog/build/dist/Release//sv/builtin.sv
Cache saving: 0.000000
SLL Parsing: 5.062 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_hdu.sv
Cache saving: 0.002000
SLL Parsing: 1.364 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_tdu.sv
Cache saving: 0.002000
LL Parsing: 1.522 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_ipic.sv
Cache saving: 0.000000
SLL Parsing: 0.374 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_csr.sv
Cache saving: 0.004000
SLL Parsing: 0.528 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_exu.sv
Cache saving: 0.002000
LL Parsing: 1.556 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_ialu.sv
Cache saving: 0.000000
SLL Parsing: 0.746 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_idu.sv
Cache saving: 0.002000
SLL Parsing: 0.484 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_ifu.sv
Cache saving: 0.002000
SLL Parsing: 0.064 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_lsu.sv
Cache saving: 0.002000
SLL Parsing: 0.054 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_mprf.sv
Cache saving: 0.000000
SLL Parsing: 0.244 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_top.sv
Cache saving: 0.002000
SLL Parsing: 0.026 ../../../build/tests/Scr1/slpp_all/work/src/core/primitives/scr1_reset_cells.sv
Cache saving: 0.000000
SLL Parsing: 0.000 ../../../build/tests/Scr1/slpp_all/work/src/core/primitives/scr1_cg.sv
Cache saving: 0.000000
SLL Parsing: 0.000 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_clk_ctrl.sv
Cache saving: 0.000000
SLL Parsing: 0.104 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_tapc_shift_reg.sv
Cache saving: 0.000000
SLL Parsing: 0.246 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_tapc.sv
Cache saving: 0.002000
SLL Parsing: 0.178 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_tapc_synchronizer.sv
Cache saving: 0.002000
SLL Parsing: 0.212 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_core_top.sv
Cache saving: 0.004000
SLL Parsing: 0.616 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_dm.sv
Cache saving: 0.004000
SLL Parsing: 0.152 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_dmi.sv
Cache saving: 0.002000
SLL Parsing: 0.254 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_scu.sv
Cache saving: 0.000000
SLL Parsing: 0.026 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_dmem_router.sv
Cache saving: 0.000000
SLL Parsing: 0.006 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_imem_router.sv
Cache saving: 0.000000
SLL Parsing: 0.038 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_dp_memory.sv
Cache saving: 0.000000
SLL Parsing: 0.030 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_tcm.sv
Cache saving: 0.000000
SLL Parsing: 0.114 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_timer.sv
Cache saving: 0.000000
LL Parsing: 0.910 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_mem_axi.sv
Cache saving: 0.000000
SLL Parsing: 0.078 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_top_axi.sv
Cache saving: 0.000000
SLL Parsing: 0.416 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_tracelog.sv
Cache saving: 0.000000
LL Parsing: 2.948 ../../../build/tests/Scr1/slpp_all/work/src/tb/scr1_memory_tb_axi.sv
Cache saving: 0.000000
SLL Parsing: 1.348 ../../../build/tests/Scr1/slpp_all/work/src/tb/scr1_top_tb_axi.sv
Cache saving: 0.000000
[WARNI:PA0205] src/pipeline/scr1_pipe_hdu.sv:13 No timescale set for "scr1_pipe_hdu".
[WARNI:PA0205] src/pipeline/scr1_pipe_tdu.sv:11 No timescale set for "scr1_pipe_tdu".
[WARNI:PA0205] src/pipeline/scr1_ipic.sv:11 No timescale set for "scr1_ipic".
[WARNI:PA0205] src/pipeline/scr1_pipe_csr.sv:18 No timescale set for "scr1_pipe_csr".
[WARNI:PA0205] src/pipeline/scr1_pipe_exu.sv:18 No timescale set for "scr1_pipe_exu".
[WARNI:PA0205] src/pipeline/scr1_pipe_ialu.sv:10 No timescale set for "scr1_pipe_ialu".
[WARNI:PA0205] src/pipeline/scr1_pipe_idu.sv:10 No timescale set for "scr1_pipe_idu".
[WARNI:PA0205] src/pipeline/scr1_pipe_ifu.sv:10 No timescale set for "scr1_pipe_ifu".
[WARNI:PA0205] src/pipeline/scr1_pipe_lsu.sv:12 No timescale set for "scr1_pipe_lsu".
[WARNI:PA0205] src/pipeline/scr1_pipe_mprf.sv:8 No timescale set for "scr1_pipe_mprf".
[WARNI:PA0205] src/pipeline/scr1_pipe_top.sv:21 No timescale set for "scr1_pipe_top".
[WARNI:PA0205] src/core/primitives/scr1_reset_cells.sv:6 No timescale set for "scr1_reset_buf_cell".
[WARNI:PA0205] src/core/primitives/scr1_reset_cells.sv:44 No timescale set for "scr1_reset_sync_cell".
[WARNI:PA0205] src/core/primitives/scr1_reset_cells.sv:71 No timescale set for "scr1_reset_buf_qlfy_cell".
[WARNI:PA0205] src/core/primitives/scr1_reset_cells.sv:132 No timescale set for "scr1_reset_and2_cell".
[WARNI:PA0205] src/core/primitives/scr1_reset_cells.sv:144 No timescale set for "scr1_reset_and3_cell".
[WARNI:PA0205] src/core/primitives/scr1_reset_cells.sv:156 No timescale set for "scr1_reset_mux2_cell".
[WARNI:PA0205] src/core/scr1_tapc_shift_reg.sv:8 No timescale set for "scr1_tapc_shift_reg".
[WARNI:PA0205] src/core/scr1_tapc.sv:11 No timescale set for "scr1_tapc".
[WARNI:PA0205] src/core/scr1_tapc_synchronizer.sv:11 No timescale set for "scr1_tapc_synchronizer".
[WARNI:PA0205] src/core/scr1_core_top.sv:18 No timescale set for "scr1_core_top".
[WARNI:PA0205] src/core/scr1_dm.sv:11 No timescale set for "scr1_dm".
[WARNI:PA0205] src/core/scr1_dmi.sv:10 No timescale set for "scr1_dmi".
[WARNI:PA0205] src/core/scr1_scu.sv:9 No timescale set for "scr1_scu".
[WARNI:PA0205] src/top/scr1_dmem_router.sv:7 No timescale set for "scr1_dmem_router".
[WARNI:PA0205] src/top/scr1_imem_router.sv:7 No timescale set for "scr1_imem_router".
[WARNI:PA0205] src/top/scr1_dp_memory.sv:8 No timescale set for "scr1_dp_memory".
[WARNI:PA0205] src/top/scr1_tcm.sv:9 No timescale set for "scr1_tcm".
[WARNI:PA0205] src/top/scr1_timer.sv:8 No timescale set for "scr1_timer".
[WARNI:PA0205] src/top/scr1_mem_axi.sv:8 No timescale set for "scr1_mem_axi".
[WARNI:PA0205] src/top/scr1_top_axi.sv:12 No timescale set for "scr1_top_axi".
[WARNI:PA0205] src/pipeline/scr1_tracelog.sv:9 No timescale set for "scr1_tracelog".
[WARNI:PA0205] src/tb/scr1_memory_tb_axi.sv:7 No timescale set for "scr1_memory_tb_axi".
[WARNI:PA0205] src/tb/scr1_top_tb_axi.sv:9 No timescale set for "scr1_top_tb_axi".
==============
PROFILE
==============
Scan libraries took 0.000s
Preprocessing took 0.486s
PP SSL Parsing: 0.000 /home/alain/Surelog/build/dist/Release//sv/builtin.sv
PP SSL Parsing: 0.008 src/pipeline/scr1_pipe_hdu.sv
PP SSL Parsing: 0.002 src/pipeline/scr1_pipe_tdu.sv
PP SSL Parsing: 0.002 src/pipeline/scr1_ipic.sv
PP SSL Parsing: 0.006 src/pipeline/scr1_pipe_csr.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_exu.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_ialu.sv
PP SSL Parsing: 0.006 src/pipeline/scr1_pipe_idu.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_ifu.sv
PP SSL Parsing: 0.002 src/pipeline/scr1_pipe_lsu.sv
PP SSL Parsing: 0.000 src/pipeline/scr1_pipe_mprf.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_pipe_top.sv
PP SSL Parsing: 0.000 src/core/primitives/scr1_reset_cells.sv
PP SSL Parsing: 0.000 src/core/primitives/scr1_cg.sv
PP SSL Parsing: 0.000 src/core/scr1_clk_ctrl.sv
PP SSL Parsing: 0.000 src/core/scr1_tapc_shift_reg.sv
PP SSL Parsing: 0.002 src/core/scr1_tapc.sv
PP SSL Parsing: 0.002 src/core/scr1_tapc_synchronizer.sv
PP SSL Parsing: 0.002 src/core/scr1_core_top.sv
PP SSL Parsing: 0.008 src/core/scr1_dm.sv
PP SSL Parsing: 0.000 src/core/scr1_dmi.sv
PP SSL Parsing: 0.002 src/core/scr1_scu.sv
PP SSL Parsing: 0.002 src/top/scr1_dmem_router.sv
PP SSL Parsing: 0.000 src/top/scr1_imem_router.sv
PP SSL Parsing: 0.000 src/top/scr1_dp_memory.sv
PP SSL Parsing: 0.002 src/top/scr1_tcm.sv
PP SSL Parsing: 0.002 src/top/scr1_timer.sv
PP SSL Parsing: 0.002 src/top/scr1_mem_axi.sv
PP SSL Parsing: 0.004 src/top/scr1_top_axi.sv
PP SSL Parsing: 0.004 src/pipeline/scr1_tracelog.sv
PP SSL Parsing: 0.002 src/tb/scr1_memory_tb_axi.sv
PP SSL Parsing: 0.004 src/tb/scr1_top_tb_axi.sv
Parsing took 20.594s
SLL Parsing: 0.060 ../../../build/tests/Scr1/slpp_all/work//home/alain/Surelog/build/dist/Release//sv/builtin.sv
Cache saving: 0.000000
SLL Parsing: 5.062 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_hdu.sv
Cache saving: 0.002000
SLL Parsing: 1.364 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_tdu.sv
Cache saving: 0.002000
LL Parsing: 1.522 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_ipic.sv
Cache saving: 0.000000
SLL Parsing: 0.374 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_csr.sv
Cache saving: 0.004000
SLL Parsing: 0.528 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_exu.sv
Cache saving: 0.002000
LL Parsing: 1.556 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_ialu.sv
Cache saving: 0.000000
SLL Parsing: 0.746 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_idu.sv
Cache saving: 0.002000
SLL Parsing: 0.484 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_ifu.sv
Cache saving: 0.002000
SLL Parsing: 0.064 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_lsu.sv
Cache saving: 0.002000
SLL Parsing: 0.054 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_mprf.sv
Cache saving: 0.000000
SLL Parsing: 0.244 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_pipe_top.sv
Cache saving: 0.002000
SLL Parsing: 0.026 ../../../build/tests/Scr1/slpp_all/work/src/core/primitives/scr1_reset_cells.sv
Cache saving: 0.000000
SLL Parsing: 0.000 ../../../build/tests/Scr1/slpp_all/work/src/core/primitives/scr1_cg.sv
Cache saving: 0.000000
SLL Parsing: 0.000 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_clk_ctrl.sv
Cache saving: 0.000000
SLL Parsing: 0.104 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_tapc_shift_reg.sv
Cache saving: 0.000000
SLL Parsing: 0.246 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_tapc.sv
Cache saving: 0.002000
SLL Parsing: 0.178 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_tapc_synchronizer.sv
Cache saving: 0.002000
SLL Parsing: 0.212 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_core_top.sv
Cache saving: 0.004000
SLL Parsing: 0.616 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_dm.sv
Cache saving: 0.004000
SLL Parsing: 0.152 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_dmi.sv
Cache saving: 0.002000
SLL Parsing: 0.254 ../../../build/tests/Scr1/slpp_all/work/src/core/scr1_scu.sv
Cache saving: 0.000000
SLL Parsing: 0.026 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_dmem_router.sv
Cache saving: 0.000000
SLL Parsing: 0.006 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_imem_router.sv
Cache saving: 0.000000
SLL Parsing: 0.038 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_dp_memory.sv
Cache saving: 0.000000
SLL Parsing: 0.030 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_tcm.sv
Cache saving: 0.000000
SLL Parsing: 0.114 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_timer.sv
Cache saving: 0.000000
LL Parsing: 0.910 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_mem_axi.sv
Cache saving: 0.000000
SLL Parsing: 0.078 ../../../build/tests/Scr1/slpp_all/work/src/top/scr1_top_axi.sv
Cache saving: 0.000000
SLL Parsing: 0.416 ../../../build/tests/Scr1/slpp_all/work/src/pipeline/scr1_tracelog.sv
Cache saving: 0.000000
LL Parsing: 2.948 ../../../build/tests/Scr1/slpp_all/work/src/tb/scr1_memory_tb_axi.sv
Cache saving: 0.000000
SLL Parsing: 1.348 ../../../build/tests/Scr1/slpp_all/work/src/tb/scr1_top_tb_axi.sv
Cache saving: 0.000000
Total time 21.082s
==============
[ FATAL] : 0
[ SYNTAX] : 0
[ ERROR] : 0
[WARNING] : 36
[ NOTE] : 0