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foss-fpga-tools
/
third_party
/
Surelog
/
5116133e9d8aa43e4097998303280bdb37ca7200
/
.
/
SVIncCompil
/
Testcases
/
UtdSV
/
inc-2.v
blob: 52d76def97b9ecac9a73b62c979e146c63d9bf42 [
file
]
`include "inc-1.h"
module a_module(
input [`
BUS_WIDTH
]
bus
);
endmodule