Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
Surelog
/
5116133e9d8aa43e4097998303280bdb37ca7200
/
.
/
SVIncCompil
/
Testcases
/
YosysTestSuite
/
lut
/
map_not.v
blob: 38599741427d3ffefa54a10c3f5e9aa532f2322f [
file
]
module
top
(...);
input a
;
output y
;
assign y
=
~
a
;
endmodule