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foss-fpga-tools
/
third_party
/
Surelog
/
5116133e9d8aa43e4097998303280bdb37ca7200
/
.
/
SVIncCompil
/
Testcases
/
YosysTestSuite
/
opt
/
opt_lut.ys
blob: a9fccbb624c05e4d47e0baf73573977396025abd [
file
]
read_verilog opt_lut
.
v
equiv_opt
-
map
+
/ice40/
cells_sim
.
v
-
assert
synth_ice40
