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foss-fpga-tools
/
third_party
/
Surelog
/
5d8813c36fc3561ecb4c6ab9a579c7fbcb8e2d87
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
regression
/
issue_00128
/
top.v
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module
top
(
b
);
input b
;
initial $display
(
"%m"
);
endmodule
