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foss-fpga-tools
/
third_party
/
Surelog
/
6974ffc5ed0bd5daee67697a11331c4ec2ca9f1e
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
architecture
/
ice40_wrapcarry
/
top.v
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module
top
(
input
[
3
:
0
]
x
,
input
[
3
:
0
]
y
,
output
[
3
:
0
]
A
,
output
[
3
:
0
]
B
);
assign B
=
x
/
y
;
endmodule
