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foss-fpga-tools
/
third_party
/
Surelog
/
6ce6840a96fc0d4401dbc401b0aecc29d7234654
/
.
/
SVIncCompil
/
Testcases
/
Yosys
/
lut
/
map_not.v
blob: 11a3a5db4736057bea84e561437cdec4adcae05a [
file
]
module
top
();
input a
;
output y
;
assign y
=
~
a
;
endmodule