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foss-fpga-tools
/
third_party
/
Surelog
/
6e9a914a8fa2b72a38fb9e60ef2c0c34df436b4a
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
simple
/
scripts
/
shregmap_match_params.ys
blob: 5aac05c55d08e8245bb3cecf8a58dd781eed6467 [
file
]
read_verilog
../
top
.
v
shregmap
-
params
-
match
2
:
2
design
-
reset
read_verilog
../
top
.
v
write_verilog synth
.
v
