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SVIncCompil
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Testcases
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chapter-6
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6.10--implicit_continuous_assignment.sv
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/*
:name: implicit_continuous_assignment
:description: implicit declaration in continuous assignment tests
:should_fail: 0
:tags: 6.10
*/
module
top
();
wire
[
3
:
0
]
a
=
8
;
wire
[
3
:
0
]
b
=
5
;
assign c
=
|
(
a
|
b
);
endmodule