Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
713605cadef845b9f44d6469208fb6e902ace095
/
.
/
SVIncCompil
/
Testcases
/
Verilator
/
t_flag_future.v
blob: 4394b97df482a90786262bef2d18f50dc7bc589b [
file
] [
log
] [
blame
]
// DESCRIPTION: Verilator: Verilog Test module
module
t
;
initial
begin
// verilator lint_off FUTURE1
$write
(
"*-* All Finished *-*\n"
);
$finish
;
// verilator FUTURE2
// verilator FUTURE2 blah blah
end
endmodule