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foss-fpga-tools
/
third_party
/
Surelog
/
8bea0781c44e5ebbeab5135503fd4ff8b9daec3b
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
regression
/
issue_00088
/
top.v
blob: 7409cbf2311766e6ce375059ef18d169a850db31 [
file
]
parameter X
=
2
;
module
top
(
b
,
c
);
input b
;
output c
;
parameter Y
=
3
;
assign c
=
b
;
endmodule
