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foss-fpga-tools
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third_party
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Surelog
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91c065df031c31bc350c1052607ca347e71c741d
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.
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src
/
Testcases
/
YosysBigSim
/
bch_verilog
/
rtl
/
log2.vh
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function
integer log2
;
input
[
31
:
0
]
value
;
for
(
log2
=
0
;
value
>
0
;
log2
=
log2
+
1
)
value
=
value
>>
1
;
endfunction
