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foss-fpga-tools
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third_party
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Surelog
/
98dd329c028fec285730d65e09a31eaf63609ccb
/
.
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src
/
Testcases
/
YosysTests
/
simple
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scripts
/
shregmap_enpol_any.ys
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read_verilog
../
top
.
v
synth_greenpak4
-
run
begin
:
map_luts
shregmap
-
enpol any
design
-
reset
read_verilog
../
top
.
v
write_verilog synth
.
v
