| ******************************************** |
| * SURELOG System Verilog Compiler/Linter * |
| ******************************************** |
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| [INFO :CM0023] Creating log file ./slpp_unit/surelog.log. |
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| [INFO :CM0020] Separate compilation-unit mode is on. |
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| [INFO :CP0300] Compilation... |
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| [INFO :CP0303] cam_bram.vh:32 Compile module "work@cam_bram". |
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| [INFO :CP0303] cam_bram_top.v:32 Compile module "work@cam_bram_top". |
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| [INFO :CP0303] cam_srl.vh:32 Compile module "work@cam_srl". |
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| [INFO :CP0303] cam_srl_top.v:32 Compile module "work@cam_srl_top". |
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| [INFO :CP0303] priority_encoder.vh:32 Compile module "work@priority_encoder". |
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| [INFO :CP0303] ram_dp.vh:32 Compile module "work@ram_dp". |
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| [INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:4 Compile class "work@mailbox". |
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| [INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:33 Compile class "work@process". |
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| [INFO :CP0302] /home/alain/Surelog/src/dist/surelog/bin/../sv/builtin.sv:58 Compile class "work@semaphore". |
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| [INFO :EL0526] Design Elaboration... |
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| [NOTE :EL0503] cam_bram_top.v:32 Top level module "work@cam_bram_top". |
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| [NOTE :EL0503] cam_srl_top.v:32 Top level module "work@cam_srl_top". |
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| [NOTE :EL0504] Multiple top level modules in design. |
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| [NOTE :EL0508] Nb Top level modules: 2. |
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| [NOTE :EL0509] Max instance depth: 4. |
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| [NOTE :EL0510] Nb instances: 6. |
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| [NOTE :EL0511] Nb leaf instances: 0. |
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| [ FATAL] : 0 |
| [ ERROR] : 0 |
| [WARNING] : 0 |
| [ NOTE] : 7 |
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| ******************************************** |
| * End SURELOG SVerilog Compiler/Linter * |
| ******************************************** |
| |
| 1.99user 0.02system 0:02.02elapsed 99%CPU (0avgtext+0avgdata 58980maxresident)k |
| 0inputs+656outputs (0major+13428minor)pagefaults 0swaps |
| sh: 2: -mt: not found |
| |
