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foss-fpga-tools
/
third_party
/
Surelog
/
a50fc0da15e88d7b685f92dc843d3d71b716c8a4
/
.
/
src
/
Testcases
/
YosysTestSuite
/
errors
/
syntax_err09.v
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module
a
(
input wire x
=
1
'b0);
endmodule
