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foss-fpga-tools
/
third_party
/
Surelog
/
a50fc0da15e88d7b685f92dc843d3d71b716c8a4
/
.
/
src
/
Testcases
/
YosysTestSuite
/
lut
/
map_mux.v
blob: ccecf30230f94c658fb5c017dcd7ac5d7e5b3d0d [
file
]
module
top
(...);
input a
,
b
,
s
;
output y
;
assign y
=
s
?
a
:
b
;
endmodule