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a50fc0da15e88d7b685f92dc843d3d71b716c8a4
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Testcases
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YosysTests
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architecture
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synth_intel_vqm.ys
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read_verilog
../
top
.
v
synth_intel
-
vqm vqm
.
vqm
write_verilog synth
.
v
