Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
b2c8950dbc163e2320c742c5badef8d829b836c0
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
simple
/
scripts
/
techmap_max_iter.ys
blob: fc5f49f26c562792d35d5b4ebf2e9e9e0f256dff [
file
]
read_verilog
../
top
.
v
proc
techmap
-
max_iter
2
synth
write_verilog synth
.
v