blob: 283019cbd675326cac577b5efebe296053003d44 [file] [log] [blame]
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* SURELOG System Verilog Compiler/Linter *
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[INFO :CM0023] Creating log file ./slpp_unit/surelog.log.
[INFO :CM0020] Separate compilation-unit mode is on.
[INFO :CM0024] Executing with 4 threads.
[ERROR:PA0207] top.v:54 Syntax error: no viable alternative at input 'SB_PLL40_CORE #(.FEEDBACK_PATH("SIMPLE"),\n .PLLOUT_SELECT("GENCLK"),\n .DIVR(4'b0000),\n .DIVF(7'd3),\n .DIVQ(3'b000),\n .FILTER_RANGE(3'b001),\n )',
) uut (
^-- ./slpp_unit/work/top.v:54 col:17.
[WARNI:PA0205] top.v:2 No timescale set for "top".
[INFO :CP0300] Compilation...
[INFO :CP0303] top.v:2 Compile module "work@top".
[NOTE :CP0309] top.v:2 Implicit port type (wire) for "D1",
there are 34 more instances of this message.
[INFO :EL0526] Design Elaboration...
[NOTE :EL0503] top.v:2 Top level module "work@top".
[WARNI:EL0500] top.v:55 Cannot find a module definition for "work@top::REFERENCECLK".
[WARNI:EL0500] top.v:74 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:99 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:124 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:149 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:174 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:199 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:224 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:249 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:274 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:299 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:324 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:349 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:374 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:399 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:424 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:449 Cannot find a module definition for "work@top::SB_RAM2048x2".
[WARNI:EL0500] top.v:480 Cannot find a module definition for "work@top::j1".
[WARNI:EL0500] top.v:517 Cannot find a module definition for "work@top::ioport".
[WARNI:EL0500] top.v:529 Cannot find a module definition for "work@top::ioport".
[WARNI:EL0500] top.v:541 Cannot find a module definition for "work@top::ioport".
[WARNI:EL0500] top.v:555 Cannot find a module definition for "work@top::inpin".
[WARNI:EL0500] top.v:556 Cannot find a module definition for "work@top::buart".
[WARNI:EL0500] top.v:571 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:572 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:573 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:574 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:575 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:580 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:581 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:582 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:583 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:584 Cannot find a module definition for "work@top::outpin".
[WARNI:EL0500] top.v:590 Cannot find a module definition for "work@top::SB_LUT4".
[WARNI:EL0500] top.v:631 Cannot find a module definition for "work@top::SB_WARMBOOT".
[NOTE :EL0508] Nb Top level modules: 1.
[NOTE :EL0509] Max instance depth: 2.
[NOTE :EL0510] Nb instances: 39.
[NOTE :EL0511] Nb leaf instances: 38.
[WARNI:EL0512] Nb undefined modules: 9.
[WARNI:EL0513] Nb undefined instances: 38.
[ FATAL] : 0
[ ERROR] : 1
[WARNING] : 38
[ NOTE] : 6
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* End SURELOG SVerilog Compiler/Linter *
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1.97user 0.03system 0:02.03elapsed 98%CPU (0avgtext+0avgdata 55516maxresident)k
40inputs+160outputs (0major+15843minor)pagefaults 0swaps