Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
ba6c8606e9b9f12023a0495454d5f82909d8bb0e
/
.
/
src
/
Testcases
/
YosysTests
/
misc
/
scripts
/
sat_prove.ys
blob: f79c3113018f61eb6c539602f54e28fcef8b7e99 [
file
] [
log
] [
blame
]
read_verilog
../
top
.
v
proc
tee
-
o result
.
log sat
-
ignore_unknown_cells
-
prove x
1
top