blob: fb3c9365dcbaeed933951cc5c492cb13cca77f08 [file]
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* SURELOG System Verilog Compiler/Linter *
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|-------|------------------|-------------------|
| | FILE UNIT COMP | ALL COMPILATION |
|-------|------------------|-------------------|
| FATAL | 0 | 0 |
| ERROR | 30 | 32 |
|WARNING| 19 | 11 |
| INFO | | |
| NOTE | 13 | 26 |
|-------|------------------|-------------------|
FILE UNIT LOG: ./slpp_unit/surelog.log
ALL FILES LOG: ./slpp_all/surelog.log
DIFFS:
./slpp_unit/work/top_3.v and ./slpp_all/work/top_3.v
./slpp_unit/work/top_4.v and ./slpp_all/work/top_4.v
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* End SURELOG SVerilog Compiler/Linter *
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1.30user 0.03system 0:01.17elapsed 113%CPU (0avgtext+0avgdata 50244maxresident)k
648inputs+432outputs (1major+20629minor)pagefaults 0swaps