Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
c224e56ce12f9a945f755a198e9de56a8e12cc89
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
misc
/
scripts
/
test_cell_edges.ys
blob: 2132c5b984dc8804e7a155e279ee9c0dee62ac10 [
file
]
read_verilog
../
top
.
v
synth
-
top top
tee
-
o result
.
log test_cell
-
edges $add