Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
d2ffe725ffd133d54bb69681bb797be77a4d5d40
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
misc
/
scripts
/
sim_clock_mem.ys
blob: bec58e0f6f4230337873d0e809e8010a8da2b753 [
file
]
read_verilog
../
top
.
v
proc
tee
-
o result
.
log sim
-
clock clk top
