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foss-fpga-tools
/
third_party
/
Surelog
/
d2ffe725ffd133d54bb69681bb797be77a4d5d40
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
regression
/
issue_00071
/
top_fault.v
blob: 3847accafd61c93e74a363f2d2ddc34380637ec6 [
file
]
module
top
(
b
);
input b
;
reg
[
31
:
0
]
reg_32
=
32
'bX;
endmodule
