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foss-fpga-tools
/
third_party
/
Surelog
/
d4bc91e228686cd8ec9eee019b4f0db9b7bc26cb
/
.
/
SVIncCompil
/
Testcases
/
Yosys
/
lut
/
map_xor.v
blob: 61956a00fc5d18edf081a4b97adfa88163e4b643 [
file
]
module
top
();
input a
,
b
;
output y
;
assign y
=
a
^
b
;
endmodule