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foss-fpga-tools
/
third_party
/
Surelog
/
e2529f92cedbbcb87ff4328ff53705669050198d
/
.
/
src
/
Testcases
/
YosysTests
/
verific
/
opers
/
sel_mux.sv
blob: ea8bb4c71bdeb552accf1e8901de1d132be51e89 [
file
]
module
top
(
input
[
2
:
0
]
s
,
input
[
5
:
0
]
a
,
output y
);
assign y
=
a
[
s
];
endmodule
