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foss-fpga-tools
/
third_party
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Surelog
/
e5c6556b40a3a34fcd4829078a3e229a4bceeeaa
/
.
/
third_party
/
tests
/
YosysTests
/
simple
/
scripts
/
expose_input.ys
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read_verilog
../
top
.
v
synth
-
top top
expose
-
input
proc
flatten
opt
opt_rmdff
expose
-
input
design
-
reset
read_verilog
../
top
.
v
synth
-
top top
write_verilog synth
.
v
