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foss-fpga-tools
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Surelog
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e911119afa19222dc9bbad9ba934f3d965e34302
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.
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SVIncCompil
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Testcases
/
YosysTests
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misc
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scripts
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design_as.ys
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read_verilog
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sv
../
top
.
v
proc
design
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save first
tee
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o result
.
log design
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copy
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from
first
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as
top_2 top
tee
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o result
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log design
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copy
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to first
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as
top_2 top
