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foss-fpga-tools
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Surelog
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e911119afa19222dc9bbad9ba934f3d965e34302
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SVIncCompil
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Testcases
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YosysTests
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misc
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scripts
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design_import.ys
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read_verilog
-
sv
../
top
.
v
proc
design
-
save first
tee
-
o result
.
log design
-
import
first top
