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foss-fpga-tools
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Surelog
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ee01fafc32b36cc0342063f4681a95b6615effbd
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SVIncCompil
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Testcases
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YosysTests
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misc
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scripts
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design_as.ys
blob: ca2c32f9153f82e08cab27b5110fe789a2ade998 [
file
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read_verilog
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sv
../
top
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v
proc
design
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save first
tee
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o result
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log design
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copy
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from
first
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as
top_2 top
tee
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o result
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log design
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copy
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to first
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as
top_2 top