Sign in
foss-fpga-tools
/
third_party
/
Surelog
/
ee01fafc32b36cc0342063f4681a95b6615effbd
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
misc
/
scripts
/
sat_prove_x.ys
blob: de91e5336b16b764f758b86f6b92a9853e7ec2a6 [
file
]
read_verilog
../
top
.
v
proc
tee
-
o result
.
log sat
-
prove
-
x x
1
middle