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foss-fpga-tools
/
third_party
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Surelog
/
efa3225881a2643e9ccda7160c9d03f47db0b646
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
frontends
/
scripts
/
verilog_defaults_pop.ys
blob: a6df3b2a422142d7c4e865865aace26ba524e6d3 [
file
]
verilog_defaults
-
add
"../top.v"
verilog_defaults
-
push
verilog_defaults
-
pop
read_verilog
proc
write_verilog synth
.
v
