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foss-fpga-tools
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third_party
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Surelog
/
efa3225881a2643e9ccda7160c9d03f47db0b646
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
simple
/
scripts
/
shregmap_match_enpol.ys
blob: b39ae1ac16988e67c11b5d4f56778b0e34bb7e86 [
file
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read_verilog
../
top
.
v
synth_greenpak4
-
run
begin
:
map_luts
shregmap
-
match foobar
-
enpol any
design
-
reset
read_verilog
../
top
.
v
write_verilog synth
.
v
