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foss-fpga-tools
/
third_party
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Surelog
/
f013e089f9bd4fcbc5ef193ac9a2a69df4c92505
/
.
/
SVIncCompil
/
Testcases
/
YosysTests
/
misc
/
scripts
/
sim_reset.ys
blob: b45f0ec32d98c55df2c72ad479ebb8f13eb46b48 [
file
]
read_verilog
../
top
.
v
proc
tee
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o result
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log sim
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reset we_b top
