("SPI", (0, 0, 0)): { | |
"MCSNO0": (0, 21, "slf_op_2"), | |
"MCSNO1": (0, 21, "slf_op_4"), | |
"MCSNO2": (0, 21, "slf_op_7"), | |
"MCSNO3": (0, 22, "slf_op_1"), | |
"MCSNOE0": (0, 21, "slf_op_3"), | |
"MCSNOE1": (0, 21, "slf_op_5"), | |
"MCSNOE2": (0, 22, "slf_op_0"), | |
"MCSNOE3": (0, 22, "slf_op_2"), | |
"MI": (0, 22, "lutff_0/in_1"), | |
"MO": (0, 20, "slf_op_6"), | |
"MOE": (0, 20, "slf_op_7"), | |
"SBACKO": (0, 20, "slf_op_1"), | |
"SBADRI0": (0, 19, "lutff_1/in_1"), | |
"SBADRI1": (0, 19, "lutff_2/in_1"), | |
"SBADRI2": (0, 20, "lutff_0/in_3"), | |
"SBADRI3": (0, 20, "lutff_1/in_3"), | |
"SBADRI4": (0, 20, "lutff_2/in_3"), | |
"SBADRI5": (0, 20, "lutff_3/in_3"), | |
"SBADRI6": (0, 20, "lutff_4/in_3"), | |
"SBADRI7": (0, 20, "lutff_5/in_3"), | |
"SBCLKI": (0, 20, "clk"), | |
"SBDATI0": (0, 19, "lutff_1/in_3"), | |
"SBDATI1": (0, 19, "lutff_2/in_3"), | |
"SBDATI2": (0, 19, "lutff_3/in_3"), | |
"SBDATI3": (0, 19, "lutff_4/in_3"), | |
"SBDATI4": (0, 19, "lutff_5/in_3"), | |
"SBDATI5": (0, 19, "lutff_6/in_3"), | |
"SBDATI6": (0, 19, "lutff_7/in_3"), | |
"SBDATI7": (0, 19, "lutff_0/in_1"), | |
"SBDATO0": (0, 19, "slf_op_1"), | |
"SBDATO1": (0, 19, "slf_op_2"), | |
"SBDATO2": (0, 19, "slf_op_3"), | |
"SBDATO3": (0, 19, "slf_op_4"), | |
"SBDATO4": (0, 19, "slf_op_5"), | |
"SBDATO5": (0, 19, "slf_op_6"), | |
"SBDATO6": (0, 19, "slf_op_7"), | |
"SBDATO7": (0, 20, "slf_op_0"), | |
"SBRWI": (0, 19, "lutff_0/in_3"), | |
"SBSTBI": (0, 20, "lutff_6/in_3"), | |
"SCKI": (0, 22, "lutff_1/in_1"), | |
"SCKO": (0, 21, "slf_op_0"), | |
"SCKOE": (0, 21, "slf_op_1"), | |
"SCSNI": (0, 22, "lutff_2/in_1"), | |
"SI": (0, 22, "lutff_7/in_3"), | |
"SO": (0, 20, "slf_op_4"), | |
"SOE": (0, 20, "slf_op_5"), | |
"SPIIRQ": (0, 20, "slf_op_2"), | |
"SPIWKUP": (0, 20, "slf_op_3"), | |
"SPI_ENABLE_0": (7, 0, "cbit2usealt_in_0"), | |
"SPI_ENABLE_1": (7, 0, "cbit2usealt_in_1"), | |
"SPI_ENABLE_2": (6, 0, "cbit2usealt_in_0"), | |
"SPI_ENABLE_3": (6, 0, "cbit2usealt_in_1"), | |
}, | |
("SPI", (25, 0, 1)): { | |
"MCSNO0": (25, 21, "slf_op_2"), | |
"MCSNO1": (25, 21, "slf_op_4"), | |
"MCSNO2": (25, 21, "slf_op_7"), | |
"MCSNO3": (25, 22, "slf_op_1"), | |
"MCSNOE0": (25, 21, "slf_op_3"), | |
"MCSNOE1": (25, 21, "slf_op_5"), | |
"MCSNOE2": (25, 22, "slf_op_0"), | |
"MCSNOE3": (25, 22, "slf_op_2"), | |
"MI": (25, 22, "lutff_0/in_1"), | |
"MO": (25, 20, "slf_op_6"), | |
"MOE": (25, 20, "slf_op_7"), | |
"SBACKO": (25, 20, "slf_op_1"), | |
"SBADRI0": (25, 19, "lutff_1/in_1"), | |
"SBADRI1": (25, 19, "lutff_2/in_1"), | |
"SBADRI2": (25, 20, "lutff_0/in_3"), | |
"SBADRI3": (25, 20, "lutff_1/in_3"), | |
"SBADRI4": (25, 20, "lutff_2/in_3"), | |
"SBADRI5": (25, 20, "lutff_3/in_3"), | |
"SBADRI6": (25, 20, "lutff_4/in_3"), | |
"SBADRI7": (25, 20, "lutff_5/in_3"), | |
"SBCLKI": (25, 20, "clk"), | |
"SBDATI0": (25, 19, "lutff_1/in_3"), | |
"SBDATI1": (25, 19, "lutff_2/in_3"), | |
"SBDATI2": (25, 19, "lutff_3/in_3"), | |
"SBDATI3": (25, 19, "lutff_4/in_3"), | |
"SBDATI4": (25, 19, "lutff_5/in_3"), | |
"SBDATI5": (25, 19, "lutff_6/in_3"), | |
"SBDATI6": (25, 19, "lutff_7/in_3"), | |
"SBDATI7": (25, 19, "lutff_0/in_1"), | |
"SBDATO0": (25, 19, "slf_op_1"), | |
"SBDATO1": (25, 19, "slf_op_2"), | |
"SBDATO2": (25, 19, "slf_op_3"), | |
"SBDATO3": (25, 19, "slf_op_4"), | |
"SBDATO4": (25, 19, "slf_op_5"), | |
"SBDATO5": (25, 19, "slf_op_6"), | |
"SBDATO6": (25, 19, "slf_op_7"), | |
"SBDATO7": (25, 20, "slf_op_0"), | |
"SBRWI": (25, 19, "lutff_0/in_3"), | |
"SBSTBI": (25, 20, "lutff_6/in_3"), | |
"SCKI": (25, 22, "lutff_1/in_1"), | |
"SCKO": (25, 21, "slf_op_0"), | |
"SCKOE": (25, 21, "slf_op_1"), | |
"SCSNI": (25, 22, "lutff_2/in_1"), | |
"SI": (25, 22, "lutff_7/in_3"), | |
"SO": (25, 20, "slf_op_4"), | |
"SOE": (25, 20, "slf_op_5"), | |
"SPIIRQ": (25, 20, "slf_op_2"), | |
"SPIWKUP": (25, 20, "slf_op_3"), | |
"SPI_ENABLE_0": (23, 0, "cbit2usealt_in_0"), | |
"SPI_ENABLE_1": (24, 0, "cbit2usealt_in_0"), | |
"SPI_ENABLE_2": (23, 0, "cbit2usealt_in_1"), | |
"SPI_ENABLE_3": (24, 0, "cbit2usealt_in_1"), | |
}, |