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foss-fpga-tools
/
third_party
/
verible
/
07095f61a411b16de8b60e28d8dde49151bc63cd
/
.
/
verilog
/
tools
/
lint
/
testdata
/
generate_label_module.sv
blob: c3252073413e130844ee02a726c9a2876cf447b7 [
file
]
module
generate_label_module
;
// verilog_lint: waive legacy-generate-region
generate
if
(
foo
)
begin
baz bam
;
end
endgenerate
endmodule
