Merge pull request #1576 from antmicro/msrs/fix-assignments-tabular

Treat kNetDeclarationAssignment the same as kNetVariable in DataDeclarationColumnSchemaScanner…

verilog/formatting/align.cc

diff --git a/verilog/formatting/align.cc b/verilog/formatting/align.cc
index d0b14dd..c9294c0 100644
--- a/verilog/formatting/align.cc
+++ b/verilog/formatting/align.cc
@@ -733,6 +733,7 @@
         ReserveNewColumn(node, FlushLeft);
         break;
       }
+      case NodeEnum::kNetDeclarationAssignment:
       case NodeEnum::kNetVariable: {
         // at path [2,0] in kNetDeclaration
         // contains the declared id

verilog/formatting/formatter_test.cc

diff --git a/verilog/formatting/formatter_test.cc b/verilog/formatting/formatter_test.cc
index ebf4358..b4428f7 100644
--- a/verilog/formatting/formatter_test.cc
+++ b/verilog/formatting/formatter_test.cc
@@ -15244,6 +15244,18 @@
      ";  // c1\n"
      "   // c2\n"
      "   // c3\n"},
+    {"module indent();\n"
+     "   reg     a;\n"
+     "   reg [32:0] b;\n"
+     "   wire    c;\n"
+     "   wire    d = e ? kFoo : kBar;\n"
+     "endmodule\n",
+     "module indent ();\n"
+     "  reg         a;\n"
+     "  reg  [32:0] b;\n"
+     "  wire        c;\n"
+     "  wire        d = e ? kFoo : kBar;\n"
+     "endmodule\n"},
 
     {"class C; T1 b; logic [$] a; T1 [$] c; endclass\n",
      "class C;\n"