Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
verible
/
60cc641dacd7b27e36f6546f2d82fd7ddb6e2fe5
/
.
/
verilog
/
tools
/
lint
/
testdata
/
disable_statement.sv
blob: a1429a054564cd783a0dd7b3a2ad9bf14bb66d6d [
file
]
module
disable_statement
;
initial
begin
fork
:
foo
begin
#6;
end
join_any
disable foo
;
end
endmodule