Merge pull request #2612 from hzeller/feature-20260918-limit-tidy
Bring clang-tidy back to zero
diff --git a/.clang-tidy b/.clang-tidy
index 70ee773..035549d 100644
--- a/.clang-tidy
+++ b/.clang-tidy
@@ -88,8 +88,12 @@
-modernize-return-braced-init-list,
-modernize-type-traits,
-modernize-use-auto,
+ -modernize-use-constraints,
+ -modernize-use-designated-initializers,
-modernize-use-emplace,
+ -modernize-use-integer-sign-comparison,
-modernize-use-nodiscard,
+ -modernize-use-ranges,
-modernize-use-trailing-return-type,
-modernize-use-transparent-functors,
misc-*,
diff --git a/verible/common/analysis/lint-rule-status.cc b/verible/common/analysis/lint-rule-status.cc
index eb36ab6..7a79a42 100644
--- a/verible/common/analysis/lint-rule-status.cc
+++ b/verible/common/analysis/lint-rule-status.cc
@@ -60,7 +60,7 @@
bool AutoFix::AddEdits(const std::set<ReplacementEdit> &new_edits) {
// Check for conflicts
for (const auto &edit : new_edits) {
- if (edits_.find(edit) != edits_.end()) {
+ if (edits_.contains(edit)) {
return false;
}
}
diff --git a/verible/common/analysis/matcher/bound-symbol-manager.cc b/verible/common/analysis/matcher/bound-symbol-manager.cc
index 7c2030c..e34dce5 100644
--- a/verible/common/analysis/matcher/bound-symbol-manager.cc
+++ b/verible/common/analysis/matcher/bound-symbol-manager.cc
@@ -27,7 +27,7 @@
namespace matcher {
bool BoundSymbolManager::ContainsSymbol(const std::string &id) const {
- return bound_symbols_.find(id) != bound_symbols_.end();
+ return bound_symbols_.contains(id);
}
const Symbol *BoundSymbolManager::FindSymbol(const std::string &id) const {
diff --git a/verible/verilog/analysis/checkers/forbidden-macro-rule.cc b/verible/verilog/analysis/checkers/forbidden-macro-rule.cc
index 34c3da1..3410e52 100644
--- a/verible/verilog/analysis/checkers/forbidden-macro-rule.cc
+++ b/verible/verilog/analysis/checkers/forbidden-macro-rule.cc
@@ -73,7 +73,7 @@
if (MacroCallMatcher().Matches(symbol, &manager)) {
if (const verible::SyntaxTreeLeaf *leaf = manager.GetAsLeaf("name")) {
const auto &imm = InvalidMacrosMap();
- if (imm.find(std::string(leaf->get().text())) != imm.end()) {
+ if (imm.contains(std::string(leaf->get().text()))) {
violations_.insert(
verible::LintViolation(leaf->get(), FormatReason(*leaf), context));
}
diff --git a/verible/verilog/analysis/checkers/forbidden-symbol-rule.cc b/verible/verilog/analysis/checkers/forbidden-symbol-rule.cc
index 04558ea..4f832c1 100644
--- a/verible/verilog/analysis/checkers/forbidden-symbol-rule.cc
+++ b/verible/verilog/analysis/checkers/forbidden-symbol-rule.cc
@@ -81,7 +81,7 @@
if (IdMatcher().Matches(symbol, &manager)) {
if (const verible::SyntaxTreeLeaf *leaf = manager.GetAsLeaf("name")) {
const auto &ism = InvalidSymbolsMap();
- if (ism.find(std::string(leaf->get().text())) != ism.end()) {
+ if (ism.contains(std::string(leaf->get().text()))) {
violations_.insert(
verible::LintViolation(leaf->get(), FormatReason(*leaf), context));
}
diff --git a/verible/verilog/analysis/checkers/struct-union-name-style-rule.cc b/verible/verilog/analysis/checkers/struct-union-name-style-rule.cc
index cd31f80..0217374 100644
--- a/verible/verilog/analysis/checkers/struct-union-name-style-rule.cc
+++ b/verible/verilog/analysis/checkers/struct-union-name-style-rule.cc
@@ -106,13 +106,13 @@
"Section with unit names need to start with digit", context));
return;
}
- if (exceptions_.find(std::string(ns)) != exceptions_.end()) {
+ if (exceptions_.contains(std::string(ns))) {
continue; // number + unit exception found
}
const auto &alpha =
std::find_if(ns.begin(), ns.end(), absl::ascii_isalpha);
const auto ns_substr = std::string(alpha, ns.end());
- if (exceptions_.find(ns_substr) == exceptions_.end()) {
+ if (!exceptions_.contains(ns_substr)) {
violations_.insert(
LintViolation(*identifier_leaf,
"found digit followed by unit that is "
diff --git a/verible/verilog/analysis/checkers/truncated-numeric-literal-rule.cc b/verible/verilog/analysis/checkers/truncated-numeric-literal-rule.cc
index 298bc6c..c6a17c2 100644
--- a/verible/verilog/analysis/checkers/truncated-numeric-literal-rule.cc
+++ b/verible/verilog/analysis/checkers/truncated-numeric-literal-rule.cc
@@ -18,6 +18,7 @@
#include <cctype>
#include <cmath>
#include <cstddef>
+#include <numbers>
#include <set>
#include <string>
#include <string_view>
@@ -136,11 +137,13 @@
// without fully parsing the decimal number ?
double v;
if (absl::SimpleAtod(literal, &v) && !std::isinf(v)) {
- return std::max(129, static_cast<int>(ceil(log(v) / log(2))));
+ return std::max(129,
+ static_cast<int>(ceil(log(v) / std::numbers::ln2)));
}
// Uh, more than 300-ish decimal digits ? ... rough estimation it is.
- return ceil((literal.length() - 1) * log(10) / log(2));
+ return ceil((literal.length() - 1) * std::numbers::ln10 /
+ std::numbers::ln2);
} break;
default:
break; // unexpected base
diff --git a/verible/verilog/analysis/checkers/void-cast-rule.cc b/verible/verilog/analysis/checkers/void-cast-rule.cc
index c9d9216..658d45a 100644
--- a/verible/verilog/analysis/checkers/void-cast-rule.cc
+++ b/verible/verilog/analysis/checkers/void-cast-rule.cc
@@ -98,7 +98,7 @@
if (FunctionMatcher().Matches(symbol, &manager)) {
if (const verible::SyntaxTreeLeaf *function_id = manager.GetAsLeaf("id")) {
const auto &bfs = ForbiddenFunctionsSet();
- if (bfs.find(std::string(function_id->get().text())) != bfs.end()) {
+ if (bfs.contains(std::string(function_id->get().text()))) {
violations_.insert(LintViolation(function_id->get(),
FormatReason(*function_id), context));
}
diff --git a/verible/verilog/analysis/flow-tree.cc b/verible/verilog/analysis/flow-tree.cc
index c5e2c23..1f28aea 100644
--- a/verible/verilog/analysis/flow-tree.cc
+++ b/verible/verilog/analysis/flow-tree.cc
@@ -139,8 +139,7 @@
}
auto macro_iterator = conditional_iterator + 1;
auto macro_identifier = macro_iterator->text();
- if (conditional_macro_id_.find(macro_identifier) ==
- conditional_macro_id_.end()) {
+ if (!conditional_macro_id_.contains(macro_identifier)) {
conditional_macro_id_[macro_identifier] = conditional_macros_counter_;
conditional_macros_.push_back(macro_iterator);
conditional_macros_counter_++;
diff --git a/verible/verilog/analysis/verilog-linter-configuration.cc b/verible/verilog/analysis/verilog-linter-configuration.cc
index 4703127..42ed8f4 100644
--- a/verible/verilog/analysis/verilog-linter-configuration.cc
+++ b/verible/verilog/analysis/verilog-linter-configuration.cc
@@ -163,7 +163,7 @@
// same configuration file, warn the user about it.
// NOTE: ignore producing a warning if there is no configuration, just
// disabing/enabling
- if (!setting.configuration.empty() && rules.count(*rule_iter)) {
+ if (!setting.configuration.empty() && rules.contains(*rule_iter)) {
absl::StrAppend(error, error->empty() ? "" : "\n", kRepeatedFlagMessage,
" \"", rule_name, "\" = ", setting.configuration);
parsed_correctly = false;
diff --git a/verible/verilog/formatting/token-annotator.cc b/verible/verilog/formatting/token-annotator.cc
index d66042f..29fe61e 100644
--- a/verible/verilog/formatting/token-annotator.cc
+++ b/verible/verilog/formatting/token-annotator.cc
@@ -263,8 +263,7 @@
// If a closing ')', that ends the definition name.
if (left.TokenEnum() == verilog_tokentype::PP_Identifier &&
right.TokenEnum() == verilog_tokentype::PP_define_body &&
- right.Text().substr(0, 2) == "``" &&
- right.OriginalLeadingSpaces().empty()) {
+ right.Text().starts_with("``") && right.OriginalLeadingSpaces().empty()) {
return {0, "Preserve spacing in concatenated name"};
}
diff --git a/verible/verilog/parser/verilog-lexical-context.cc b/verible/verilog/parser/verilog-lexical-context.cc
index 740e3fe..445dff7 100644
--- a/verible/verilog/parser/verilog-lexical-context.cc
+++ b/verible/verilog/parser/verilog-lexical-context.cc
@@ -46,7 +46,7 @@
TK_endprogram, TK_endproperty, TK_endsequence, TK_endchecker,
TK_endconnectrules, TK_enddiscipline, TK_endnature, TK_endparamset,
TK_join, TK_join_any, TK_join_none});
- return keywords->find(token_enum) != keywords->end();
+ return keywords->contains(token_enum);
}
void KeywordLabelStateMachine::UpdateState(int token_enum) {
diff --git a/verible/verilog/preprocessor/verilog-preprocess.cc b/verible/verilog/preprocessor/verilog-preprocess.cc
index 39e816a..89ddb7d 100644
--- a/verible/verilog/preprocessor/verilog-preprocess.cc
+++ b/verible/verilog/preprocessor/verilog-preprocess.cc
@@ -535,7 +535,7 @@
const auto ¯o_name = *macro_name_extract.value();
const bool negative_if = (*ifpos)->token_enum() == PP_ifndef;
const auto &defs = preprocess_data_.macro_definitions;
- const bool name_is_defined = defs.find(macro_name->text()) != defs.end();
+ const bool name_is_defined = defs.contains(macro_name->text());
const bool condition_met = (name_is_defined ^ negative_if);
if ((*ifpos)->token_enum() == PP_elsif) {