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foss-fpga-tools
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third_party
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verible
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7ef4fe45b18f3999c48af7db0b868d6fca18f025
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.
/
verilog
/
tools
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lint
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testdata
/
explicit_begin.sv
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module
explicit_begin
();
always_comb
a
=
1
;
endmodule
