Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
verible
/
84f33d0b439f929a9e13e338b7a620e9b9df85e6
/
.
/
verilog
/
tools
/
lint
/
testdata
/
endif_comment.sv
blob: 50d23bcd83273464a2f8f7d84aaebdcea769b76f [
file
]
package
endif_comment
;
`ifdef FOOBAR
parameter int P = 4;
`
endif
endpackage