verilog: formatting: formatter_test.cc: Added unit test for the under-indented clause

Added a unit test to formatter_test for the case found by the fuzzer
where the indent level would go below zero

Signed-off-by: Jan Bylicki <jbylicki@antmicro.com>

verilog/formatting/formatter_test.cc

diff --git a/verilog/formatting/formatter_test.cc b/verilog/formatting/formatter_test.cc
index b0cf132..d4f0ad2 100644
--- a/verilog/formatting/formatter_test.cc
+++ b/verilog/formatting/formatter_test.cc
@@ -434,6 +434,10 @@
      "             aaaa     == zzz;\n"
      "             ggg      == vv::w;,\n"
      "             \"Failed to ..........\")\n"},
+    {// macro call nested with function call containing an ifdef
+     "`J(D(`ifdef e))\n",
+     "`J(D(\n"
+     "   `ifdef e))\n"},
 
     // `uvm macros indenting
     {