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foss-fpga-tools
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third_party
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verible
/
bbe85ac0e45bb1e955b2b705e5b21d4a00a39b66
/
.
/
verilog
/
tools
/
lint
/
testdata
/
explicit_begin.sv
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module
explicit_begin
();
always_comb
a
=
1
;
endmodule