Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
verible
/
c0be15ca4a960080f00a294dfb9c5bb532d6220c
/
.
/
verilog
/
tools
/
lint
/
testdata
/
union_name_style.sv
blob: d872204bede819e60dc9320a3aa246868d4142a3 [
file
]
// Union names should be lower_snake_case and end with '_t'
typedef
union
{
int
val
;
logic
[
8
:
0
]
pointer
;
}
camelUnion
;