Sign in
◑
Theme
foss-fpga-tools
/
third_party
/
verible
/
cb308592efa9e149a48c07fb462d735c1f5e3639
/
.
/
verilog
/
tools
/
lint
/
testdata
/
endif_comment.sv
blob: 50d23bcd83273464a2f8f7d84aaebdcea769b76f [
file
]
package
endif_comment
;
`ifdef FOOBAR
parameter int P = 4;
`
endif
endpackage
