Fix calling system functions without parentheses

This commit removes the error message when formatting
system functions without parentheses, because they
are formatted well after all.

Fixes #1280,
Fixes #1223,
Fixes #1247,
Fixes #1392.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>

verilog/formatting/tree_unwrapper.cc

diff --git a/verilog/formatting/tree_unwrapper.cc b/verilog/formatting/tree_unwrapper.cc
index c71f9a5..b7160a0 100644
--- a/verilog/formatting/tree_unwrapper.cc
+++ b/verilog/formatting/tree_unwrapper.cc
@@ -2060,8 +2060,9 @@
 
     paren_group_ = FindDirectChild(main_node_,
                                    OriginTagIs{NodeTag(NodeEnum::kParenGroup)});
+
+    // Macro can be used without parentheses
     if (!paren_group_) {
-      LOG_PARTITION_BUG("paren_group not found.");
       return false;
     }