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foss-fpga-tools
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verible
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d6f06e4e4eeb838cb48e07546a30fa39c8399e08
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.
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verilog
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tools
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lint
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testdata
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one_module_per_file.sv
blob: ec1da9a0ec9033e4f6ab42aed41616c5750f1fa6 [
file
]
// Each file should have only one module
module
one_module_per_file
;
// module name must be the same as file name
endmodule
module
second
;
endmodule