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verible
/
de1451db099c723095c4863751faa3e7c9f525db
/
.
/
verilog
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tools
/
lint
/
testdata
/
case_missing_default.sv
blob: a970ee40def65742e38acb03026e9a7ec5d6111f [
file
]
// This case statement is missing a default case
function
automatic
int
foo
(
input bit
in
);
case
(
in
)
1
:
return
0
;
endcase
endfunction