Refactor redundant logic for ignoring common partition patterns.

PiperOrigin-RevId: 331041118

verilog/formatting/align.cc

diff --git a/verilog/formatting/align.cc b/verilog/formatting/align.cc
index 85cc2fa..e147a9f 100644
--- a/verilog/formatting/align.cc
+++ b/verilog/formatting/align.cc
@@ -101,7 +101,7 @@
   return false;
 }
 
-static bool IgnoreWithinActualNamedParameterPartitionGroup(
+static bool IgnoreCommentsAndPreprocessingDirectives(
     const TokenPartitionTree& partition) {
   const auto& uwline = partition.Value();
   const auto token_range = uwline.TokensRange();
@@ -113,22 +113,25 @@
   if (IsPreprocessorKeyword(verilog_tokentype(token_range.front().TokenEnum())))
     return true;
 
+  return false;
+}
+
+static bool IgnoreWithinActualNamedParameterPartitionGroup(
+    const TokenPartitionTree& partition) {
+  if (IgnoreCommentsAndPreprocessingDirectives(partition)) return true;
+
   // ignore everything that isn't passing a parameter by name
+  const auto& uwline = partition.Value();
   return !verible::SymbolCastToNode(*uwline.Origin())
               .MatchesTag(NodeEnum::kParamByName);
 }
 
 static bool IgnoreWithinActualNamedPortPartitionGroup(
     const TokenPartitionTree& partition) {
+  if (IgnoreCommentsAndPreprocessingDirectives(partition)) return true;
+
   const auto& uwline = partition.Value();
   const auto token_range = uwline.TokensRange();
-  CHECK(!token_range.empty());
-  // ignore lines containing only comments
-  if (TokensAreAllComments(token_range)) return true;
-
-  // ignore partitions belonging to preprocessing directives
-  if (IsPreprocessorKeyword(verilog_tokentype(token_range.front().TokenEnum())))
-    return true;
 
   // ignore wildcard connections .*
   if (verilog_tokentype(token_range.front().TokenEnum()) ==
@@ -152,21 +155,6 @@
   return false;
 }
 
-static bool IgnoreWithinDataDeclarationPartitionGroup(
-    const TokenPartitionTree& partition) {
-  const auto& uwline = partition.Value();
-  const auto token_range = uwline.TokensRange();
-  CHECK(!token_range.empty());
-  // ignore lines containing only comments
-  if (TokensAreAllComments(token_range)) return true;
-
-  // ignore partitions belonging to preprocessing directives
-  if (IsPreprocessorKeyword(verilog_tokentype(token_range.front().TokenEnum())))
-    return true;
-
-  return false;
-}
-
 // This class marks up token-subranges in named parameter assignments for
 // alignment. e.g. ".parameter_name(value_expression)"
 class ActualNamedParameterColumnSchemaScanner : public ColumnSchemaScanner {
@@ -728,7 +716,7 @@
 static const verible::AlignedFormattingHandler kDataDeclarationAligner{
     .extract_alignment_groups = verible::ExtractAlignmentGroupsAdapter(
         &GetConsecutiveDataDeclarationGroups,
-        &IgnoreWithinDataDeclarationPartitionGroup),
+        &IgnoreCommentsAndPreprocessingDirectives),
     .alignment_cell_scanner =
         AlignmentCellScannerGenerator<DataDeclarationColumnSchemaScanner>(),
 };
@@ -736,7 +724,7 @@
 static const verible::AlignedFormattingHandler kClassPropertyAligner{
     .extract_alignment_groups = verible::ExtractAlignmentGroupsAdapter(
         &GetConsecutiveDataDeclarationGroups,
-        &IgnoreWithinDataDeclarationPartitionGroup),
+        &IgnoreCommentsAndPreprocessingDirectives),
     .alignment_cell_scanner =
         AlignmentCellScannerGenerator<ClassPropertyColumnSchemaScanner>(),
 };